AT/TS8xC51Rx2
11.5.11 External Clock Drive Characteristics (XTAL1)
Symbol
TCLCL
TCHCX
TCLCX
TCLCH
TCHCL
TCHCX/TCLCX
Parameter
Oscillator Period
High Time
Low Time
Rise Time
Fall Time
Cyclic ratio in X2 mode
Min
Max
25
5
5
5
5
40
60
11.5.12 External Clock Drive Waveforms
Figure 11-11. External Clock Drive Waveforms
VCC-0.5 V
0.45 V
0.7VCC
0.2VCC-0.1 V
TCHCL
TCLCX
TCHCX
TCLCH
TCLCL
Units
ns
ns
ns
ns
ns
%
11.5.13 AC Testing Input/Output Waveforms
Figure 11-12. AC Testing Input/Output Waveforms
INPUT/OUTPUT
VCC-0.5 V
0.45 V
0.2VCC+0.9
0.2VCC-0.1
AC inputs during testing are driven at VCC - 0.5 for a logic “1” and 0.45V for a logic “0”. Timing
measurement are made at VIH min for a logic “1” and VIL max for a logic “0”.
11.5.14 Float Waveforms
Figure 11-13. Float Waveforms
FLOAT
VOH-0.1 V VLOAD
VOL+0.1 V
VLOAD+0.1 V
VLOAD-0.1 V
For timing purposes a port pin is no longer floating when a 100 mV change from load voltage
occurs and begins to float when a 100 mV change from the loaded VOH/VOL level occurs. IOL/IOH
≥ ± 20mA.
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4188F–8051–01/08