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TDA16846(2000) 查看數據表(PDF) - Infineon Technologies

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TDA16846 Datasheet PDF : 28 Pages
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TDA 16846
TDA 16847
Second a High Power Shutdown Comparator (FC2) is implemented: When the voltage
V6 at Pin 6 exceeds 1.2 V the Error Flip Flop (ERR) is set. The output voltage of the
power measurement circuit (Pin 8) is smoothed by R8/C6 and applied to the high power
shutdowninput at Pin 6. The relation between this voltage V6 and the output power of
the converter P is approximately:
V6 (P × LSecondary × 5 V)/(VOUT2 × C8 × R9)
LSecondary: The transformers secondary inductance
VOUT: The converters output voltage
So the time constant of R9/C8 for a certain high power shutdown level PSD is:
R9 × C8 (PSD × LSecondary × 4.2)/VOUT2
The converters high power shutdown level can be dimensioned lower (by R9, C8) than
the current limit level (see current limiting). So because of the delay R8/C6, the
converter can deliver maximum output power (current limit level) for a certain time (e. g.
for power pulses like motor start current) and a power below the high power shutdown
level for unlimited time. This has the advantage that the thermal dimensioning of the
power devices is only needed for the lower power level. Once the voltage V6 exceeds
1.2 V there are no more charge or discharge actions at Pin 8. The voltage V6 remains
high due to the bias current out of HPC and the converter remains switched-off. Reset
can be done by either plug-off the supply from the mains or with a high value resistor R6
(Figure 14). R6 causes a reset every view seconds. When Pin 9 is not connected or gets
too less current the temporary high power circuit is disabled.
Data Sheet
18
2000-01-14

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