UPD17717 查看數據表（PDF） - NEC => Renesas Technology
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UPD17717
NEC => Renesas Technology
UPD17717 Datasheet PDF : 408 Pages
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µPD17717, 17718, 17719
7. ALU (Arithmetic Logic Unit) BLOCK ............................................................................................. 56
7.1 Outline of ALU Block .......................................................................................................... 56
7.2 Configuration and Function of Each Block ....................................................................... 57
7.3 ALU Processing Instruction List ........................................................................................ 57
7.4 Cautions on Using ALU ....................................................................................................... 61
8. REGISTER FILE (RF) ........................................................................................................................ 62
8.1 Outline of Register File ....................................................................................................... 62
8.2 Configuration and Function of Register File ..................................................................... 63
8.3 Control Registers ................................................................................................................. 64
8.4 Port Input/Output Selection Registers ............................................................................... 76
8.5 Cautions on Using Register File ........................................................................................ 82
9. DATA BUFFER (DBF) ....................................................................................................................... 83
9.1 Outline of Data Buffer .......................................................................................................... 83
9.2 Data Buffer ........................................................................................................................... 84
9.3 Relationships between Peripheral Hardware and Data Buffer ........................................ 85
9.4 Cautions on Using Data Buffer ........................................................................................... 88
10. DATA BUFFER STACK .................................................................................................................. 89
10.1 Outline of Data Buffer Stack ............................................................................................... 89
10.2 Data Buffer Stack Register ................................................................................................. 89
10.3 Data Buffer Stack Pointer ................................................................................................... 91
10.4 Operation of Data Buffer Stack .......................................................................................... 92
10.5 Using Data Buffer Stack ...................................................................................................... 93
10.6 Cautions on Using Data Buffer Stack ................................................................................ 93
11. GENERAL-PURPOSE PORT .......................................................................................................... 94
11.1 Outline of General-purpose Port ........................................................................................ 94
11.2 General-Purpose I/O Port (P0A, P0B, P0C, P1D, P2A, P2B, P2C, P2D, P3A,
P3B, P3C, P3D) ..................................................................................................................... 97
11.3 General-Purpose Input Port (P0D, P1A, P1C) ................................................................... 111
11.4 General-Purpose Output Port (P1B) .................................................................................. 114
12. INTERRUPT ..................................................................................................................................... 115
12.1 Outline of Interrupt Block ................................................................................................... 115
12.2 Interrupt Control Block ....................................................................................................... 117
12.3 Interrupt Stack Register ...................................................................................................... 131
12.4 Stack Pointer, Address Stack Registers, and Program Counter .................................... 135
12.5 Interrupt Enable Flip-Flop (INTE) ....................................................................................... 135
12.6 Accepting Interrupt .............................................................................................................. 136
12.7 Operations after Interrupt Has Been Accepted ................................................................. 141
12.8 Returning from Interrupt Routine ....................................................................................... 141
12.9 External Interrupts (CE and INT0 through INT4 pins) ...................................................... 142
12.10 Internal Interrupts ................................................................................................................ 145
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