UPD161831 查看數據表（PDF） - NEC => Renesas Technology

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UPD161831

240/244-OUTPUT TFT-LCD SOURCE DRIVER WITH TIMING GENERATOR (COMPATIBLE WITH 64-GRAY SCALES)

NEC => Renesas Technology 

5 1. BLOCK DIAGRAM

µPD161831

C1+/−

C2+/−

C3+/−

C4+/−

C5+/−

DCCLK

OSC

VCC

VSS1

VDC

SCLK

SI

SO

LCDCS

SCLEG0

SCLEG1

/CS1

CS2

SCLK_SUB

SO_SUB

A0

Serial

Interface

D00-D05

D10-D15

D20-D25

DCK

CKS

RSW_O

GSW_O

BSW_O

EXT1_O

EXT2_O

EXT3_O

GCLK_O

GSTB_O

GOE1_O

GOE2_O

GR,/L_O

VDD2

L/S

VSS2/3

RSW_I

GSW_I

BSW_I

EXT1_I

EXT2_I

EXT3_I

VDD2

L/S

VSS2/3

GCLK_I

GSTB_I

GOE1_I

GOE2_I

RGB

Interface

Multiplex

Switch

Control

Gate

Control

GAM

V0-V4

γ Control

BIAS

Control

DC/DC converter

DC/DC converter

VREF

VDC2

VDC

VGD

VDD2

VSS1

VSS2

VR

VS

Command

Decoder

Timing

Controler

VCOM

Buffer

COMDCIN

COMDCSL

COMDC

COMC

VCOMH

244-bit bidirectional shift register

Data register

Data latch

RGB SW

Level shifter

D/A converter

STHR

STHL

TCON

Data

POL

Latch

AP

Control

STB

HSEG

VSEG

TEST_COM2

TEST_VCLAMP

PVCC

PVSS

BGR_O

Output buffer

S1

S244

Remark /xxx indicates active low signal.

2

Preliminary Product Information S16269EJ2V0PM

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