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UPD64A 查看數據表(PDF) - NEC => Renesas Technology

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UPD64A Datasheet PDF : 64 Pages
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µPD64A, 65
4. TIMER
4.1 Timer Configuration
The timer is the block used for creating a remote control transmission pattern. As shown in Figure 4-1, it consists
of a 9-bit down counter (t8 to t0), a flag (t9) to enable the 1-bit timer output, and a zero detector.
Figure 4-1. Timer Configuration
S1/LED
REM
Carrier
synchronous
circuit
Bit 3 of control register 0 (P3)
T
T1
T0
Count
t9
t8 t7
t6 t5 t4 t3
t2 t1 t0 clock
9-bit down counter
fX/64
fX/128
Zero detector
Timer operation end signal
(HALT #×101B release
signal)
Bit 2 of control register 0 (P3)
Carrier signal
Data Sheet U14380EJ3V0DS00
19

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