µPD750064, 750066, 750068, 750064(A), 750066(A), 750068(A)
4.2 Setting Method of Stack Bank Select Register (SBS)
Switching between the Mk I mode and Mk II mode can be done by the stack bank select register (SBS). Figure
4-1 shows the format.
The SBS is set by a 4-bit memory manipulation instruction.
When using the Mk I mode, the SBS must be initialized to 100×BNote at the beginning of a program. When using
the Mk II mode, it must be initialized to 000×BNote.
Note Set the desired value in the × position.
Figure 4-1. Stack Bank Select Register Format
Address
F84H
3
2
1
0 Symbol
SBS3 SBS2 SBS1 SBS0 SBS
Stack area specification
0 0 Memory bank 0
0 1 Memory bank 1
Other than above setting prohibited
0 0 must be set in the bit 2 position.
Mode switching specification
0 Mk II mode
1 Mk I mode
Caution Since SBS. 3 is set to “1” after a RESET signal is generated, the CPU operates in the Mk I mode.
When executing an instruction in the Mk II mode, set SBS. 3 to “0” to select the Mk II mode.
Data Sheet U10165EJ2V0DS00
17