µPD75064, 75066, 75068, 75064(A), 75066(A), 75068(A)
5.3 Clock Output Circuit
The clock output circuit outputs clock pulses from the P22/PCL pin, and is used to supply clock pulses to
remote unit controller and peripheral LSIs.
• Clock output (PCL): Φ, 524 kHz, 262 kHz, 65.5 kHz (fX = at 4.19 MHz)
Figure 5-2. Clock Output Circuit Configuration
From the clock
generator
Φ
fX / 23
fX / 24
fX / 26
Selector
Output
buffer
P22/PCL
CLOM3 0 CLOM1 CLOM0 CLOM
PORT2.2
P22 output
latch
4
Internal bus
Bit 2 of PMGB
Port 2 input/
output mode
specification bit
Remark Measures are taken to prevent outputting a narrow pulse when selecting clock output
enable/disable.
20