UPD75206GF 查看數據表（PDF） - NEC => Renesas Technology

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UPD75206GF

4-BIT SINGLE-CHIP MICROCOMPUTER

NEC => Renesas Technology 

µPD75206

Fig. 5-6 Timer/Pulse Generator Block Diagram (PWM Pulse Generate Mode)

TPGM3

Internal Bus

8

MODH

8

MODL

Modulo Register H (8) Modulo Register L (6) (2)

TPGM1

fx 1/2

Frequency Divider

MODH (8)

MODL7-2 (6)

Modulo Latch (14)

PWM Pulse Generator

Selector

Output Buffer

PPO

INTTPG

(IRQTPG Set Signal)

TPGM5

( 215 = 7.81 ms : at 4.19 MHz operation)

fX

TPGM7

5.7 SERIAL INTERFACE

The serial interface has the following functions:

• Clocked 8-bit transmission/reception operation (synchronous transmission/reception)

• Clocked 8-bit serial bus operation (inputs/outputs data via SO pin. SO output is of N-ch open-drain.)

• LSB first/MSB first selectable

These features allows the serial interface to communicate data with the serial bus of the other microcomputers

such as µPD7500 series and 78K series and to be connected with peripheral devices.

20

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