UPD77113A 查看數據表（PDF） - NEC => Renesas Technology
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UPD77113A Datasheet PDF : 62 Pages
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µPD77113A, 77114
• Host interface
Pin Name
HA1
Pin No.
100-pin TQFP 80-pin BGA
72
B8
HA0
71
C8
HCS
HRD
HWR
HRE
HWE
HD0 - HD7
68
69
70
66
67
63 - 56
E6
D8
D7
−
−
F5, E8, E9, F7,
G6, F9, F8, H8
I/O
Function
Shared by:
Input Specifies the register to be accessed by HD7
−
through HD0.
• 1: Accesses the host interface status
register (HST).
• 0: Accesses the host transmit data register
(HDT (out)) when read (HRD = 0), and
host receive data register (HDT (in))
when written (HWR = 0).
Input Specifies the register to be accessed by HD7
−
through HD0.
• 1: Accesses bits 15 through 8 of HST, HDT
(in), and HDT (out).
• 0: Accesses bits 7 through 0 of HST, HDT
(in), and HDT (out).
Input Chip select input
−
Input Host read input
−
Input Host write input
−
Output Host read enable output
−
Output Host write enable output
−
I/O 8-bit host data bus
−
(3S)
Remark The pins marked “3S” under the heading “I/O” go into a high-impedance state when the host interface is
not being accessed.
• I/O ports
Pin Name
P0
P1
P2
P3
Pin No.
100-pin TQFP 80-pin BGA
55
H7
54
G8
53
G7
52
H6
I/O
Function
I/O General-purpose I/O port
I/O
I/O
I/O
Shared by:
−
−
−
−
Data Sheet U14373EJ3V0DS
13
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