µPSD325X DEVICES
Symbol
Parameter
Test Condition
(in addition to those in
Table 110, page 146)
Min.
Typ. Max. Unit
ITL
Logic 1-to-0 Transition Current
(Ports 1,2,3,4)
VIN = 3.5V
(2.5V for Port 4[pin 2])
–25
–250
µA
ISTBY
SRAM (PSD) Stand-by Current
(VSTBY input)
VCC = 0V
0.5
1
µA
IIDLE
SRAM (PSD) Idle Current
(VSTBY input)
VCC > VSTBY
–0.1
0.1
µA
IRST
Reset Pin Pull-up Current
(RESET)
VIN = VSS
–10
–55
µA
IFR
XTAL Feedback Resistor
Current (XTAL1)
XTAL1 = VCC
XTAL2 = VSS
–20
–50
µA
ILI
Input Leakage Current
VSS < VIN < VCC
–1
1
µA
ILO
Output Leakage Current
0.45 < VOUT < VCC
–10
10
µA
IPD1
Power-down Mode
VCC = 3.6V
LVD logic disabled
LVD logic enabled
110
µA
180
µA
Active (12MHz)
Idle (12MHz)
ICC_CPU2,3,6
Active (24MHz)
Idle (24MHz)
VCC = 3.6V
VCC = 3.6V
8
10
mA
4
5
mA
15
20
mA
8
10
mA
PLD Only
ICC_PSD
(DC)6
Operating
Supply Current
Flash
memory
PLD_TURBO = Off,
f = 0MHz 7
PLD_TURBO = On,
f = 0MHz
During Flash memory
WRITE/Erase Only
Read-only, f = 0MHz
µA/
0
PT5
200
400
µA/
PT
10
25
mA
0
0
mA
SRAM
f = 0MHz
0
0
mA
PLD AC Base
note 5
ICC_PSD
(AC)6
Flash memory AC Adder
SRAM AC Adder
1.5
2.0
mA/
MHz
0.8
1.5
mA/
MHz
Note: 1. IPD (Power-down Mode) is measured with:
XTAL1=VSS; XTAL2=not connected; RESET=VCC; Port 0 =VCC; all other pins are disconnected. PLD not in Turbo mode.
2. ICC_CPU (active mode) is measured with:
XTAL1 driven with tCLCH, tCHCL = 5ns, VIL = VSS+0.5V, VIH = Vcc – 0.5V, XTAL2 = not connected; RESET=VSS; Port 0=VCC; all
other pins are disconnected. ICC would be slightly higher if a crystal oscillator is used (approximately 1mA).
3. ICC_CPU (Idle Mode) is measured with:
XTAL1 driven with tCLCH, tCHCL = 5ns, VIL = VSS+0.5V, VIH = VCC– 0.5V, XTAL2 = not connected; Port 0 = VCC;
RESET=VCC; all other pins are disconnected.
4. PLD is in non-Turbo Mode and none of the inputs are switching.
5. See Figure 72 for the PLD current calculation.
6. I/O current = 0 mA, all I/O pins are disconnected.
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