VG26S17400E 查看數據表（PDF） - Vanguard International Semiconductor
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VG26S17400E Datasheet PDF : 25 Pages
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VIS
VG26(V)(S)17400E
4,194,304 x 4 - Bit
CMOS Dynamic RAM
Refresh Cycle
VG26 (V) (S) 17400E
Parameter
-5
-6
Unit
Symbol Min Max Min Max
CAS setup time (CBR refresh)
CAS hold time (CBR refresh)
RAS precharge to CAS hold time
tCSR
tCHR
tRPC
10
- 10
- ns
10
- 10
- ns
5
-
5
- ns
RAS pulse width (self refresh)
RAS precharge time (self refresh)
CAS hold time (CBR self refresh)
WE setup time
WE hold time
Fast Page Mode Cycle
tRASS
100
tRPS
90
tCHS
-50
tWSR
0
tWHR
10
- 100
- 110
- -50
-
0
- 10
- µs
- ns
- ns
- ns
- ns
VG26 (V) (S) 17400E
Parameter
-5
-6
Unit
Symbol Min Max Min Max
Fast page mode cycle time
Fast page mode CAS Precharge time
tPC
35
- 40
- ns
tCP
10
- 10
- ns
Fast page mode RAS pulse width
Access time from CAS precharge
RAS hold time from CAS precharge
Fast Page Mode Read Modify Write Cycle
tRASP
tCPA
tCPRH
50 105
- 30
30
-
60 105 ns
- 35 ns
35
- ns
VG26 (V) (S) 17400E
Parameter
-5
-6
Unit
Symbol Min Max Min Max
Fast page mode read - modify - write cycle CAS tCPW
45
- 55
- ns
precharge to WE delay time
Fast page mode read - modify - write cycle time tPRWC
70
- 80
- ns
Notes
10
7
Notes
20
10,14
Notes
11
Document : 1G5-0142
Rev.1
Page 12
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