VITESSE
SEMICONDUCTOR CORPORATION
Multi-Rate SONET/SDH
Clock and Data Recovery IC
Figure 5: High-Speed Clock and Data Outputs
Data Sheet
VSC8122
Data Output
tPD
Clock Output
tR, tF
tR
tF
80%
20%
80%
20%
Table 4: High-Speed Inputs and Outputs
Parameters
Description
Min Typ Max Units
Conditions
∆VOD
∆VOC
VCMO
VDIFF
RIN
Data output voltage swing
600
Clock output voltage swing
500
Common-mode range (DO/CO)
2.6
Serial input absolute voltage, single
ended peak-to-peak swing (VIH-
250
VIL) for DI +/-
Input resistance between DI+ and
VTERM or DI- and VTERM
43
900 1000 mV
700 1000 mV
—
3.2
V
— 1200 mV AC-coupled
—
58
Ω
Table 5: PLL Parameters
Parameters
Description
REF_CLK Duty Cycle
REF_CLK Frequency Range
VIH
REF_CLK Input High Voltage
VIL
REF_CLK Input Low Voltage
Min Typ Max Units
45
—
55
%
-100
—
+100 ppm
VCC-
—
1.165
VCC-
0.7
V
VCC-
2.0
—
VCC-
1.475
V
Conditions
Page 6
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52228-0, Rev 4.1
01/05/01