VITESSE
SEMICONDUCTOR CORPORATION
2.5Gb/s 16-Bit
Multiplexer/Demultiplexer Chipset
Data Sheet
VSC8061/VSC8062
Table 7: VSC8061 Pin Identifications
Pin Number Pin number
QH Package F Package
Signal
Name
I/O
Level
Description
38
13
CLK
I
HS
High-speed clock true(1)
37
12
CLKN
I
HS
High-speed clock, complement (1)
9
34
DCLK
I
ECL Data clock true(1)
10
35
DCLKN
I
ECL Data Clock complement(1)
34
9
CLK16
O
ECL Clock divide-by-16, true
33
8
CLK16N
O
ECL Clock divide-by-16, complement
11, 15-20, 22-
25, 28-32
1-3, 5, 6,
8-42, 44, 45,
47, 48, 50, 51
D[0:15]
I
ECL Parallel data inputs
45
19
DO
O
HS Serial data output, true
44
17
DON
O
HS Serial data output, complement
7
31
U
O
ECL Phase detector output - up frequency
8
32
D
O
ECL Phase detector output - down frequency
1, 12, 27,
39, 51
4, 10, 18, 30,
36, 43, 49
VCC
Pwr
Most positive power supply
2, 5, 13, 14, 21,
26, 35
7,46
VTT
Pwr
DCFL negative power supply
36, 42, 43,
46, 49
33
VEE
Pwr
SCFL negative power supply
6, 40, 41, 47,
48, 50
11, 14-16,
20-22, 24-26,
29, 37, 52
NC
Do not connect, leave open
3, 4
27, 28
Test
Test inputs. Used in factory for testing, connect to
VTT through a resistor
52
23
VEE
Pwr
NOTE: (1) Can be used single-ended.
Heat sink bias, connect to VEE
Page 12
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
G52069-0, Rev 4.3
05/11/01