VSC8113QB1 查看數據表（PDF） - Vitesse Semiconductor

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VSC8113QB1

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux with Integrated Clock Generation and Clock Recovery

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux

with Integrated Clock Generation and Clock Recovery

Data Sheet

VSC8113

Table 13: Clock Multiplier Unit Performance

Name

RCd

RCj

RCj

RCj

RCj

RCf

OCj

OCj

OCj

OCj

OCfrange

OCd

Description

Reference clock duty cycle

Reference clock jitter (RMS) @ 77.76 MHz ref (1)

Reference clock jitter (RMS) @ 51.84 MHz ref (1)

Reference clock jitter (RMS) @ 38.88 MHz ref (1)

Reference clock jitter (RMS) @ 19.44 MHz ref (1)

Reference clock frequency tolerance (2)

Output clock jitter (RMS) @ 77.76 MHz ref (3)

Output clock jitter (RMS) @ 51.84 MHz ref (3)

Output clock jitter (RMS) @ 38.88 MHz ref (3)

Output clock jitter (RMS) @ 19.44 MHz ref (3)

Output frequency

Output clock duty cycle

Min

Typ

Max

Units

40

60

%

13

ps

12

ps

9

ps

5

ps

-20

+20

ppm

8

ps

10

ps

13

ps

15

ps

620

624

MHz

40

60

%

(1) These Reference Clock Jitter limits are required for the outputs to meet SONET system level jitter requirements

(< 10 mUIrms)

(2) Needed to meet SONET output frequency stability requirements

(3) Measured

Note: Jitter specification is defined utilizing a 12KHz - 5MHz LP-HP single pole filter.

AC Characteristics

Table 14: PECL and TTL Outputs

Parameters

TR,TTL

TF,TTL

TR,PECL

TF,PECL

Description

TTL Output Rise Time

TTL Output Fall Time

PECL Output Rise Time

PECL Output Fall Time

Min Typ Max Units

Conditions

—

2

—

ns 10-90%

—

1.5

—

ns 10-90%

—

350

—

ps 20-80%

—

350

—

ps 20-80%

Page 14

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

G52154-0, Rev 4.2

3/19/99

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