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VSC8113QB2 查看數據表(PDF) - Vitesse Semiconductor

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VSC8113QB2 Datasheet PDF : 28 Pages
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VITESSE
SEMICONDUCTOR CORPORATION
ATM/SONET/SDH 622 Mb/s Transceiver Mux/Demux
with Integrated Clock Generation and Clock Recovery
Data Sheet
VSC8113
Table 17: Pin Definitions
Signal
Pin
I/O
Level
Pin Description
VDD
31
N/C
32
RX50MCK
33
VSS
34
RXOUT0
35
RXOUT1
36
VSS
37
RXOUT2
38
RXOUT3
39
VSS
40
RXOUT4
41
RXOUT5
42
VSS
43
RXOUT6
44
RXOUT7
45
VSS
46
RXLSCKOUT
47
FP
48
VDD
49
LOSOUT
50
CRUREFCLK
51
LOSTTL
52
LOSPECL
53
VDD
54
VSS
55
REFCLK
56
LOOPTIM1
57
VDD
58
VSSA
59
VSSA
60
N/C
61
VDDA
62
CP1
63
+3.3V +3.3V Power Supply
No connection
O
TTL
Constant 51.84MHz ref clock output, derived from the CMU
GND Ground
O
TTL
Receive output data bit0
O
TTL
Receive output data bit1
GND Ground
O
TTL
Receive output data bit2
O
TTL
Receive output data bit3
GND Ground
O
TTL
Receive output data bit4
O
TTL
Receive output data bit5
GND Ground
O
TTL
Receive output data bit6
O
TTL
Receive output data bit7
GND Ground
O
TTL
Receive byte clock output
O
TTL
Frame detection pulse
+3.3V +3.3V Power Supply
O
TTL
Loss of Signal alarm indicator
I
TTL
Optional external CRU reference clock @77.76MHz
I
TTL
Loss of Signal Control - TTL input
I
PECL Loss of Signal Control- Single ended PECL input
+3.3V +3.3V Power Supply
GND
Ground
I
TTL
Reference clock input, refer to table 12
I
TTL
Enable loop timing operation; active HIGH
+3.3V +3.3V Power Supply
GND
Analog Ground (CMU)
GND
Analog Ground (CMU)
No connection
+3.3V Analog Power Supply (CMU)
Analog CMU external capacitor (see Figure 6, and Table 1)
Page 18
© VITESSE SEMICONDUCTOR CORPORATION
741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896
G52154-0, Rev 4.2
3/19/99

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