VSC8166 查看數據表（PDF） - Vitesse Semiconductor

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VSC8166

2.488 Gbit/sec 1:16 SONET/SDH Demux with Clock Recovery

Vitesse Semiconductor 

VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Datasheet

VSC8166

2.488 Gbit/sec

1:16 SONET/SDH Demux with Clock Recovery

Figure 5: High Speed Serial Data Inputs

Chip Boundary

VCC = 3.3V

ZO

CIN

50Ω

CAC

VTerm

50Ω

CIN

ZO

CIN TYP = 100 pF

CAC TYP = 100pF

VEE = 0V

Supplies

This device is specified as a LVPECL device with a single positive 3.3V supply. Should the user desire to

use the device in a ECL environment with a negative 3.3V supply, then VCC will be ground and VEE will be -

3.3V.

Decoupling of the power supplies is a critical element in maintaining the proper operation of the part. It is

recommended that the VCC power supply be decoupled using a 0.1µF and 0.01µF capacitor placed in parallel on

each VCC power supply pin as close to the package as possible. If room permits, a 0.001µF capacitor should

also be placed in parallel with the 0.1µF and 0.01µF capacitors mentioned above. Recommended capacitors are

low inductance ceramic SMT X7R devices. For the 0.1µF capacitor, a 0603 package should be used. The

0.01µF and 0.001µF capacitors can be either 0603 or 0403 packages.

For low frequency decoupling, 47µF tantalum low inductance SMT caps should be sprinkled over the

board’s main +3.3V power supply and placed close to the C-L-C pi filter.

If the device is being used in an ECL environment with a -3.3V supply, then all references to decoupling

VCC must be changed to VEE, and all references to decoupling 3.3V must be changed to -3.3V.

G52252-0, Rev. 3.0

11/9/99

© VITESSE SEMICONDUCTOR CORPORATION

741 Calle Plano, Camarillo, CA 93012 • 805/388-3700 • FAX: 805/987-5896

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