VITESSE
SEMICONDUCTOR CORPORATION
Preliminary Data Sheet
VSC8169
OC-48 (FEC) 16:1 SONET/SDH
MUX with Clock Generator
Pin #
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
Name
NC
D14-
D14+
VCC
D15-
D15+
VEE
NC
NC
NC
NC
NC
REFCLK+
REFCLK-
VCC
VEE
REFCLKO+
REFCLKO-
VEE_ANA
VCC_ANA
NC
NC
VEE
VEE
VCC
I/O
Level
Description
—
—
No connect, leave unconnected(1)
I
LVPECL Low-speed differential parallel data
I
LVPECL Low-speed differential parallel data
—
+3.3V Positive power supply
I
LVPECL Low-speed differential parallel data
I
LVPECL Low-speed differential parallel data
—
GND Negative power supply
—
—
No connect, leave unconnected(1)
—
—
No connect, leave unconnected(1)
—
—
No connect, leave unconnected(1)
—
—
No connect, leave unconnected(1)
—
—
No connect, leave unconnected(1)
I
LVPECL Reference clock input, true
I
LVPECL Reference clock input, complement
—
+3.3V Positive power supply
—
GND Negative power supply
O
LVPECL Reference clock output, true
O
LVPECL Reference clock output, complement
—
GND Negative power supply pins for analog parts of CMU
—
+3.3V Positive power supply pins for analog parts of CMU
—
—
No connect, leave unconnected(1)
—
—
No connect, leave unconnected(1)
—
GND Negative power supply
—
GND Negative power supply
—
+3.3V. Positive power supply
NOTE: (1) No connect (NC) pins must be left unconnected, or floating. Connecting any of these pins to either the positive or neg-
ative power supply rails may cause improper operation or failure of the device; or in extreme cases, cause permanent
damage to the device.
G52230-0, Rev 3.6
01/02/01
© VITESSE SEMICONDUCTOR CORPORATION • 741 Calle Plano • Camarillo, CA 93012
Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com
Internet: www.vitesse.com
Page 15