W65C02S 查看數據表（PDF） - Unspecified

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W65C02S

8-bit Microprocessor

Unspecified 

The Western Design Center, Inc.

4.9 Program Counter Relative r

W65C02S Data Sheet

The Program Counter relative addressing mode, sometimes referred to as Relative Addressing, is used with the Branch

instructions. If the condition being tested is met, the second byte of the instruction is added to the Program Counter and

program control is transferred to this new memory location.

Byte:

Instruction:

2

1

0

offset OpCode

New PC value

PCH

PCL

+

offset

effective address

4.10 Stack s

The Stack may use memory from 0100 to 01FF and the effective address of the Stack address mode will always be within

this range. Stack addressing refers to all instructions that push or pull data from the stack, such as Push, Pull, Jump to

Subroutine, Return from Subroutine, Interrupts and Return from Interrupt.

Byte:

Instruction:

2

1

0

OpCode

Operand address:

1

S

4.11 Zero Page zp

With Zero Page (zp) addressing the second byte of the instruction is the address of the operand in page zero.

Byte:

Instruction:

2

1

0

zp

OpCode

Operand address:

0

zp

4.12 Zero Page Indexed Indirect (zp,x)

The Zero Page Indexed Indirect addressing mode is often referred to as Indirect,X. The second byte of the instruction is the

zero page address to which the X Index Register is added and the result points to the low byte of the indirect address.

Byte:

Instru ction:

2

1

0

zp

OpCode

Base Address:

Indirect Address:

+

0

zp

X

address

Operand address:

indirect address

The Western Design Center, Inc.

W65C02S Data Sheet

18

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