W65C02S 查看數據表（PDF） - Unspecified
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W65C02S Datasheet PDF : 40 Pages
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The Western Design Center, Inc.
W65C02S Datasheet
6.2 AC Characteristics TA = -40°C to +85°C (PLCC, QFP) TA= 0°C to 70°C (DIP)
Table 6-3 AC Characteristics
Symbol
Parameter
VDD
tACC
tAH
tADS
tBVD
CEXT
tPWH
tPWL
tCYC
t F,tR
tPCH
tPCS
tDHR
tDSR
tMDS
tDHW
Supply Voltage
Access Time
Address Hold Time
Address Setup Time
BE to Valid Data (1)
Capacitive Load (2)
Clock Pulse Width High
Clock Pulse Width Low
Cycle Time (3)
Fall Time, Rise Time
Processor Control Hold Time
Processor Control Setup Time
Read Data Hold Time
Read Data Setup Time
Write Data Delay Time
Write Data Hold Time
5.0 +/-5%
14MHz
Min Max
4.75 5.25
30
-
10
-
-
30
-
25
-
35
35
-
35
-
70
-
-
5
10
-
10
-
10
-
10
-
-
25
10
-
3.3 +/-10%
8MHz
Min Max
3.0 3.6
70
-
10
-
-
40
-
30
-
35
62
-
63
-
125
-
-
5
10
-
15
-
10
-
15
-
-
40
10
-
3.0 +/-5%
8MHz
Min Max
2.85 3.15
70
-
10
-
-
40
-
30
-
35
62
-
63
-
125
-
-
5
10
-
15
-
10
-
15
-
-
40
10
-
2.5 +/-5%
4MHz
Min Max
2.375 2.675
145
-
10
-
-
75
-
30
-
35
125
-
125
-
250
-
-
5
10
-
30
-
10
-
30
-
-
70
10
-
1.8 +/-5%
2MHz
Min Max
1.71 1.89
290 -
10
-
- 150
-
30
-
35
250 -
250 -
500 -
-
5
10
-
60
-
10
-
60
-
- 140
10
-
Units
V
nS
nS
nS
nS
pF
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
1. BE to High Impedance State is not testable but should be the same amount of time as BE to Valid Data
2. ATE or loading on all outputs
3. Since this is a static design, the maximum cycle time could be infinite.
The Western Design Center, Inc.,
W65C02S Datasheet
25
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