W77E516 查看數據表（PDF） - Winbond

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W77E516

8-BIT MICROCONTROLLER

Winbond 

Preliminary W77E516

TF1: Timer 1 overflow flag: This bit is set when Timer 1 overflows. It is cleared automatically when

the program does a timer 1 interrupt service routine. Software can also set or clear this bit.

TR1: Timer 1 run control: This bit is set or cleared by software to turn timer/counter on or off.

TF0: Timer 0 overflow flag: This bit is set when Timer 0 overflows. It is cleared automatically when

the program does a timer 0 interrupt service routine. Software can also set or clear this bit.

TR0: Timer 0 run control: This bit is set or cleared by software to turn timer/counter on or off.

IE1: Interrupt 1 edge detect: Set by hardware when an edge/level is detected on INT1. This bit is

cleared by hardware when the service routine is vectored to only if the interrupt was edge

triggered. Otherwise it follows the pin.

IT1: Interrupt 1 type control: Set/cleared by software to specify falling edge/ low level triggered

external inputs.

IE0: Interrupt 0 edge detect: Set by hardware when an edge/level is detected on INT0 . This bit is

cleared by hardware when the service routine is vectored to only if the interrupt was edge

triggered. Otherwise it follows the pin.

IT0: Interrupt 0 type control: Set/cleared by software to specify falling edge/ low level triggered

external inputs.

Timer Mode Control

Bit:

7

6

5

4

3

2

1

0

GATE C / T

M1

M0 GATE C / T

M1

M0

Mnemonic: TMOD

TIMER1

TIMER0

Address: 89h

GATE: Gating control: When this bit is set, Timer/counter x is enabled only while INTx pin is

high and TRx control bit is set. When cleared, Timer x is enabled whenever TRx control bit

is set.

C / T : Timer or Counter Select: When cleared, the timer is incremented by internal clocks. When

set, the timer counts high-to-low edges of the Tx pin.

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