WM2617 查看數據表（PDF） - Wolfson Microelectronics plc

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WM2617

Dual 10-Bit Serial DAC with Power Down

Wolfson Microelectronics plc 

WM2617

Production Data

First,

0d01 1111 1111 11xx

is written (bit D15 on the left, D0 on the right) to the serial interface. This loads the full-scale code

into the double buffer but does not change the latch B contents and the DAC B output voltage.

The latch A contents and the DAC A output are also unaffected by this write operation.

Changing from fast to slow to fast mode changes the supply current which can glitch the outputs,

and so D14 (designated by d in the above data word) should be set to maintain the speed mode

set by the previous write.

Next,

1d0X 1000 0000 00xx

is written (bit D15 on the left, D0 on the right) to the serial interface. Bit D14 can be zero to select

slow mode or one to select fast mode. The X in bit D12 can be zero or one (don’t care). This

writes the mid-scale code (100000000000) to latch A and also copies the full-scale code from the

double buffer to latch B. Both DAC outputs thus begin to rise after the second write.

WOLFSON MICROELECTRONICS LTD

PD Rev 1.1 October 2000

9

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