CMX980A 查看數據表（PDF） - MX-COM Inc

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CMX980A

Digital Radio Baseband Processor

MX-COM Inc  

Digital Radio Baseband Processor

21

CMX980A Advance Information

4.8.3.1 UNIVERSAL REGISTERS ACCESSIBLE IN ALL PAGES

ConfigCtrl1

Title:

Address:

Function:

Description:

Configuration Control register

$0x00

RW

General configuration bits, together with operational control signal bits.

Bit

7

6

5

4

(5,4)

3

2

1

0

Name

DataRateHi

TxHandshakeEn

BiDirCmdPortEn

RxDataForCmdRdEn

CommandReadDataMode

LowRxRdFS

RxDataPortDisable

RdCmdPortDisable

SymboModuBypass

Active

High

High

High

High

00

01

10, 11

High

High

High

High

State

RW

RW

RW

RW

RW

RW

RW

RW

RW

Function

When set active all serial port data transfers will be

at half of the master clock rate. When inactive, all

serial port data rates will be at a quarter of the

master clock rate. This has the effect of altering the

Rx sample output rate from 8 times the symbol rate

when active to 4 times when inactive.

When set active enables the transmit hardware

interlock protocol, thereby stopping the Serial Clock

(SClk) if the transmit path is enabled and the

transmit FIFO is full.

When this bit is set active the Cmd port will drive its

data line out of the chip for the last 8 bits of read

operations. When set inactive command read data

will be returned on either the Rx or the CmdRd port

(default).

This bit only takes effect if the BiDirCmdPortEn bit

is inactive. When set active this bit causes all

command read operations to respond with data on

the Rx serial port. When set inactive the command

read data will be output via the CmdRd port

(default).

The BiDirCmdPortEn bit and RxDataForCmdRdEn

bit together control the method by which command

read data is returned to the user.

(Default) Read data returned on CmdRd port.

Read data returned on Rx port and CmdRd port

Read data returned on Cmd port.

When set active both the CmdRdFS and the RxFS

output pins will be driven active low, when set

inactive the two frame sync's will be driven active

high (default).

When set active tristates the RxDat and RxFS pins.

When set active tristates the CmdRdDat and

CmdRdFS pins.

Setting this bit bypasses the modulator, thereby

taking the least significant 3 bits of each Command

Transmit Data Serial Word received via the serial

interface to represent an absolute constellation

mapping.

Address and Data format for ConfigCtrl1 access

Address field [6:0]

Data field [7:0]

0000000

D7 D6 D5 D4 D3 D2 D1 D0

2000 MX-COM, Inc.

www.mxcom.com tel: 800 638 5577 336 744 5050 fax: 336 744 5054

Doc. 20480201.001

4800 Bethania Station Road, Winston-Salem, NC 27105-1201, USA

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