G121SN01-V3 查看數據表（PDF） - AU Optronics
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G121SN01-V3 Datasheet PDF : 27 Pages
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Product Specification
AU OPTRONICS CORPORATION
G121SN01 V3
6.3 Signal Description
The module uses a LVDS receiver embedded in AUO ’s ASIC. LVDS is a differential signal technology for LCD
interface and a high-speed data transfer device. Mating LVDS transmitter: THC63LVDM83A or equivalent device
Pin Assignment:
Pin# Signal Name
1
VCC
2
VCC
3
GND
4 6-8Bit SEL
5
RIN0-
6
RIN0+
7
GND
8
RIN1-
9
RIN1+
10
GND
11
RIN2-
12
RIN2+
13
GND
14
CLKIN-
15
CLKIN+
16
GND
17
RIN3-
18
RIN3+
19 REVERSE
20 NC/GND
Description
3.3V Power Supply
3.3V Power Supply
GND
Select 6 or 8 Bits LVDS Input (VCC:8Bits ; GND/NC: 6Bits)
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Negative(-) LVDS differential data input
Positive(+) LVDS differential data input
GND
Clock Signal(-)
Clock Signal(+)
GND
Negative(-) LVDS differential data input (Used for 8Bits LVDS Input; NC for 6Bits)
Positive(+) LVDS differential data input(Used for 8Bits LVDS Input; NC for 6Bits)
Display Reversed Function(VCC: Display Reverse; GND/NC: Normal Display)
AUO Test Function Pin(Do not set this pin to High)
Note1： Pin19 can be used for enabling “reverse scan” function.
Refer to section 6.1 for scanning direction.
Signal Description:
Signal Name
RxIN0-, RxIN0+
RxIN1-, RxIN1+
RxIN2-, RxIN2+
CKIN-, CKIN+
Reverse
VDD
GND
NC
Description
LVDS differential data input (Red0-Red5, Green0)
LVDS differential data input (Green1-Green5, Blue0-Blue1)
LVDS differential data input (Blue2-Blue5, Hsync, Vsync, DE)
LVDS differential clock input
High: Reverse Display; NC/GND: Normal Display
+3.3V Power Supply
Ground
No Connection
Note: Input signals shall be low or Hi-Z state when VDD is off.
G121SN01 V3 rev.0.0
16/27
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