1.5 Explanation of DC Error
Specifications
1.5.1 INPUT OFFSET RELATED ERRORS
The input offset error (VE) is extracted from input offset
measurements (see Section 1.4.1 “Input Offset Test
Circuit”), based on Equation 1-1:
EQUATION 1-3:
VE = VM – VREF GDM1 + gE
VE has several terms, which assume a linear response
to changes in VDD, VSS, VCM, VOUT and TA (all of which
are in their specified ranges):
EQUATION 1-4:
VE
=
VO
S
+
-----V----D---D-----–---------V----S--S-
PSRR
+
------V----C---M---
CMRR
+
------V----R---E----F---
CMRR2
+
-----V----O---U----T-
AOL
+
TA
TC1
Where:
PSRR, CMRR, CMRR2 and AOL are in
units of V/V
∆TA is in units of °C
TC1 is in units of V/°C
VDM = 0
Equation 1-2 shows how VE affects VOUT.
1.5.2
INPUT OFFSET COMMON MODE
NONLINEARITY
The input offset error (VE) changes nonlinearly with
VCM. Figure 1-9 shows VE vs. VCM, as well as a linear
fit line (VE_LIN) based on VOS and CMRR. The INA is in
standard conditions (∆VOUT = 0, VDM = 0, etc.). VCM is
swept from VIVL to VIVH. The test circuit is in
Section 1.4.1 “Input Offset Test Circuit” and VE is
calculated using Equation 1-3.
MCP6N16
VE, VE_LIN (V)
V3
V2
VE_LIN
VE
V1
VE
VIVL
VDD/2
VIVH
VCM (V)
FIGURE 1-9:
Input Offset Error vs.
Common Mode Input Voltage.
Based on the measured VE data, we obtain the
following linear fit:
EQUATION 1-5:
VE_LIN = VOS + VCM – VDD 2 CMRR
Where:
VOS = V2
1 CMRR = V3 – V1 VIVH – VIVL
The remaining error (∆VE) is described by the Common
Mode Nonlinearity spec:
EQUATION 1-6:
INLCMH = maxVE VIVH – VIVL
INLCML = minVE VIVH – VIVL
INLCM = INLCMH INLCMH INLCML
Where:
= INLCML otherwise
VE = VE – VE_LIN
The same common mode behavior applies to VE when
VREF is swept, instead of VCM, since both input stages
are designed the same:
EQUATION 1-7:
VE_LIN2 = VOS + VREF – VDD 2 CMRR2
INLCMH2 = maxVE2 VIVH – VIVL
INLCML2 = minVE2 VIVH – VIVL
INLCM2 = INLCMH2
= INLCML2
Where:
INLCMH2 INLCML2
otherwise
VE2 = VE – VE_LIN2
2014 Microchip Technology Inc.
DS20005318A-page 15