EVAL1203/BA 查看數據表（PDF） - STMicroelectronics
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EVAL1203/BA Datasheet PDF : 21 Pages
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TSA1203
CONDITIONS
AVCC = DVCC = VCCB = 2.5V, Fs= 40Msps, Fin=10.13MHz, Vin@ -1dBFS, VREFP=0.8V, VREFM=0V
Tamb = 25°C (unless otherwise specified)
DYNAMIC CHARACTERISTICS
Symbol
Parameter
SFDR Spurious Free Dynamic Range
SNR Signal to Noise Ratio
THD Total Harmonics Distortion
SINAD Signal to Noise and Distortion Ratio
ENOB Effective Number of Bits
TIMING CHARACTERISTICS
Test conditions
Min Typ Max Unit
-68.3 -59.5 dBc
60.7 66.1
dB
-66.6 -58 dBc
56.5 62.8
dB
9.1 10.3
bits
Symbol
Parameter
Test conditions
Min Typ Max Unit
FS Sampling Frequency
0.5
DC Clock Duty Cycle
45
50
TC1 Clock pulse width (high)
22.5 25
TC2 Clock pulse width (low)
22.5 25
Tod Data Output Delay (Clock edge to Data Valid) 10pF load capacitance
9
Tpd I Data Pipeline delay for I channel
7
Tpd Q Data Pipeline delay for Q channel
7.5
Ton Falling edge of OEB to digital output valid data
1
Toff Rising edge of OEB to digital output tri-state
1
40 MHz
55
%
ns
ns
ns
cycles
cycles
ns
ns
2/21
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