80960KB(1993) 查看數據表（PDF） - Intel
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80960KB Datasheet PDF : 39 Pages
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80960KB
2.8.1. AC Specification Tables
Table 7. 80960KB AC Characteristics (16 MHz)
Symbol
Parameter
Min Max Units
Notes
Input Clock
T1
Processor Clock Period (CLK2)
31.25 125
ns VIN = 1.5V
T2
Processor Clock Low Time (CLK2) 8
ns VIL = 10% Point = 1.2V
T3
Processor Clock High Time
8
(CLK2)
ns VIH = 90% Point = 0.1V + 0.5 VCC
T4
Processor Clock Fall Time (CLK2)
T5
Processor Clock Rise Time (CLK2)
Synchronous Outputs
10
ns VIN = 90% Point to 10% Point (1)
10
ns VIN = 10% Point to 90% Point (1)
T6
Output Valid Delay
T6H
HLDA Output Valid Delay
T7
ALE Width
T8
ALE Output Valid Delay
T9
Output Float Delay
T9H
HLDA Output Float Delay
Synchronous Inputs
2
25
ns
4
28
ns
15
ns
2
18
ns
2
20
ns (2)
4
20
ns (2)
T10
T11
T11H
T12
T13
T14
T15
T16
T17
NOTES:
Input Setup 1
Input Hold
HOLD Input Hold
Input Setup 2
Setup to ALE Inactive
Hold after ALE Inactive
Reset Hold
Reset Setup
Reset Width
3
5
4
8
10
8
3
5
1281
ns (3)
ns (3)
ns (3)
ns (3)
ns
ns
ns (3)
ns (3)
ns 41 CLK2 Periods Minimum
1. Clock rise and fall times are not tested.
2. A float condition occurs when the maximum output current becomes less than ILO. Float delay is not tested; however, it should not be longer than
the valid delay.
3. LAD31:0, BADAC, HOLD, LOCK and READY are synchronous inputs. IAC/INT0, INT1, INT2/INTR and INT3 may be synchronous or asynchronous.
17
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