AC Characteristics
Hardware Reset (RESET , N/A on 32-pin PLCC & (s)TSOP packages)
Parameter
JEDEC Std
tREADY
tREADY
tRP
tRH
tRB
tRPD
Description
RESET Pin Low (During Embedded
Algorithms) to Read or Write (See Note)
RESET Pin Low (Not During Embedded
Algorithms) to Read or Write (See Note)
RESET Pulse Width
RESET High Time Before Read (See Note)
RY/BY Recovery Time
RESET Low to Standby Mode
Note: Not 100% tested.
Test Setup
Max
Max
Min
Min
Min
Min
RESET Timings
A29L004 Series
All Speed Options
Unit
20
µs
500
ns
500
ns
50
ns
0
ns
20
µs
RY/BY
CE, OE
RESET
RY/BY
CE, OE
RESET
tRH
tRP
tReady
Reset Timings NOT during Embedded Algorithms
Reset Timings during Embedded Algorithms
tReady
tRB
tRP
PRELIMINARY (October, 2002, Version 0.0)
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AMIC Technology, Corp.