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C504 查看數據表(PDF) - Siemens AG

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C504 Datasheet PDF : 49 Pages
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C504
Timer / Counter 0 and 1
Timer/Counter 0 and 1 can be used in four operating modes as listed in table 4.
Table 4
Timer/Counter 0 and 1 Operating Modes
Mode Description
0
8-bit timer/counter with a
divide-by-32 prescaler
1
16-bit timer/counter
2
8-bit timer/counter with
8-bit autoreload
3
Timer/counter 0 used as one
8-bit timer/counter and one
8-bit timer
Timer 1 stops
Gate
X
TMOD
C/T M1
X0
Input Clock
M0 internal external (max)
0
f / OSC 12 × 32
f / OSC 24 × 32
X
X
1
1
f / OSC 12
X
X
0
0
f / OSC 12
f / OSC 24
f / OSC 24
X
X
1
1
f / OSC 12
f / OSC 24
In the “timer” function (C/T = ‘0’) the register is incremented every machine cycle. Therefore the
count rate is fOSC/12.
In the “counter” function the register is incremented in response to a 1-to-0 transition at its
corresponding external input pin (P3.4/T0, P3.5/T1). Since it takes two machine cycles to detect a
falling edge the max. count rate is fOSC/24. External inputs INT0 and INT1 (P3.2, P3.3) can be
programmed to function as a gate to facilitate pulse width measurements. Figure 5 illustrates the
input clock logic.
Figure 5
Timer/Counter 0 and 1 Input Clock Logic
Semiconductor Group
20

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