CE5038 查看數據表（PDF） - Intel
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CE5038 Datasheet PDF : 41 Pages
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Pin Symbol Direction
CE5038
Function
24 P0
Switching port P0.
Out
‘0’ = disabled (high impedance).
‘1’ = enabled.
Data Sheet
Schematics
P0/P1
25 LOCK
26 VccRF
Output which indicates that phase
comparator phase and frequency lock
Out
has been obtained and that the varactor
voltage is within ‘tune unlock’ window.
This powers up in logic ‘0’ state.
+5 v voltage supply for RF
RF Bypass differential outputs.
27 RFBYPASS
Out
AC couple outputs. Matching circuitry as
per applications diagram (Figure 2).
28 RFBYPASS
Out
In applications where RF Bypass is not
required, pins should not be connected.
29 VccRF
30 N/C
+5 v voltage supply for RF
Not connected. Ground externally.
31 RFIN
32 RFIN
33 N/C
In
RF differential inputs.
AC couple input.
Matching circuitry as per applications
In
diagram.
Not connected. Ground externally.
34 RFAGC
In
RF analogue gain control input
LOCK
CMOS Digital Output
VccRF
Vref
5k
RFAGC
20k
10
Intel Corporation
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