CMX644A 查看數據表（PDF） - CML Microsystems Plc

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CMX644A

V.22 and Bell 212A Modem

CML Microsystems Plc 

V22 and Bell 212A Modem

CMX644A

1.5.3

Software Description

Write-only ‘C-BUS’ Registers

REGISTER

NAME

HEX

ADDRESS/

COMMAND

BIT 7

(D7)

GENERAL

RESET

$01

N/A

BIT 6

(D6)

N/A

BIT 5

(D5)

N/A

BIT 4

(D4)

N/A

BIT 3

(D3)

N/A

BIT 2

(D2)

N/A

BIT 1

(D1)

N/A

BIT 0

(D0)

N/A

SET-UP

TX

TONES

GAIN

BLOCKS

RELAY DETECT DETECT LOOP-

LOOP-

XTAL

XTAL

$E0

0

DRIVE

DET1

DET0

BACK:

BACK:

FRQ:

FRQ:

L1

L0

X1

X0

TONE

TONE / DTMF /

DTMF /

$E1

SEL

NOTONE MODEM

SNGL

D3

D2

D1

D0

TONES

TXGAIN TXGAIN TXGAIN TXGAIN RXGAIN RXGAIN RXGAIN RXGAIN

$E2

TG3

TG2

TG1

TG0

RG3

RG2

RG1

RG0

TX DATA

BYTE

$E3

D7

D6

D5

D4

D3

D2

D1

D0

UART

$E4

MODE

TX PSK

MODE

$E7

0

0

SYNC/

STOP

STOP

PARITY PARITY

DATA

ASYNC

BITS

BITS

ENABLE

ODD/

BITS

B

A

EVEN

8/7

TXON SCRAMB SCRAMB EQUAL EQUAL ENABLE HI / LO

0

ENAB UNLOCK ENABLE

ET1

ET0

BAND

RX PSK

CPBW

DE-

DE-

EQUAL EQUAL

HI / LO

MODE

$E8

0

SELECT SCRAMB SCRAMB

ER1

ER0

ENABLE BAND

UNLOCK ENABLE

IRQ

RX

RING

RX DATA

RX

TX DATA

TX

UN-SCRAM

MASK BITS

$EE

PARITY DETECT DETECT OVER-

DATA

UNDER-

DATA

MARK

FLOW

READY FLOW

READY

Write-only Register Descriptions

GENERAL RESET ($01)

The reset command has no data attached to it. Application of the GENERAL RESET sets all write-only

register bits to ‘0’.

SET-UP Register ($E0)

(Bit 7)

Reserved for future use. This bit should be set to ‘0’.

RELAY DRIVE

(Bit 6)

This bit controls a low impedance pull-down transistor connected to the

RLYDRV pin to assist with the operation of an ‘off-hook relay’. When set

to ‘1’ the transistor acts as a pull-down and will sink current. When set

to ‘0’ the pin is in a high impedance state.

DETECT DET1 and DET0

(Bits 5 and 4)

These 2 bits control the operation of the receiver filter in order to facilitate

the detection of the following signals as shown in the table below:

DET1

Bit 5

DET0

Bit 4

Required Rx HI/LO Band Setting

(Register $E8, Bit 0)

Detection

Mode

0

0

As required for Rx PSK

PSK Carrier

0

1

LO = ‘0’

Call Progress

1

0

HI = ‘1’

Answer Tone

1

1

As required for Rx PSK

Detectors OFF

Rx PSK MODE register ENABLE bit should be set to ‘1’ for answertone

and call progress detection.

© 2000 Consumer Microcircuits Limited

10

D/644A/6

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