IFX91041 查看數據表（PDF） - Infineon Technologies

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IFX91041

1.8A DC/DC Step-Down Voltage Regulator 5.0V, 3.3V or Adjustable Output Voltage

Infineon Technologies 

IFX91041

Buck Regulator

5

Buck Regulator

5.1

Description

The gate of the power switch is driven by the external capacitor connected to pin BDS (Buck Driver Supply) using

the bootstrap principle. An integrated under voltage lockout function supervising the ’bootstrap’ capacitor voltage

ensures that the device is always driven with a sufficient bootstrap voltage in order to prevent from extensive heat

up of the power transistor. An integrated charge pump supports the gate drive in case of low input supply voltage,

small differential voltage between input supply and output voltage at low current and during startup. In order to

minimize emission, the charge pump is switched off if the input voltage is sufficient for supplying the bootstrap.

The soft start function generates a defined ramp of the output voltage during the first 0.5 ms (typ.) after device

initialization. The device initialization is triggered either by the EN voltage level crossing the turn-on threshold,

rising supply voltage (during EN=H), and also when the device restarts a after thermal shutdown. The ramp starts

after the BDS external capacitor is charged.

The regulation scheme uses a voltage controlled pulse width modulation with feed forward path (the feed forward

operates for supply voltages from 8.0V to 36V) which provides a fast line transient reaction.

In order to maintain the output voltage regulation even under low duty cycle conditions (light load conditions down

to ICC=0mA, high input voltage) a pulse skipping operation mode is implemented. Pulse skipping is also used for

operation with low supply voltages, related to high duty cycles >92%

In case of a lost connection to the pin FB , an internal pull-up current prevents from a uncontrolled rise of the output

voltage (version IFX91041EJV only).

COMP

L when Overcurrent

OC

Comp.

=

Error

FB

Amp.

Soft start

SYNC

VRef

0.6 V

=

Ramp

Generator

Feedforward

ΔV=k X VS Oscillator

Vmax

Vmin

tr tf tr t

PWM H when

Error -Signal Comp.

Error -Signal <

Error -Ramp

Output Stage

OFF when H

Error -Ramp

OFF

L when

when H

Tj > 175 °C R & Q

L when

Output

overvoltage

Schmitt-Trigger 1

Ramp Vhigh

&

S

Q

Clock Error -FF

Vlow

tr tf tr

t

NOR1

>_1

Charge

Pump

Gate Driver

Supply

R

H = INV H =

& Q OFF 1 ON

NAND 2

&

&

S

Q

PWM-FF

H when

UV at VBDS

Gate

Driver

BDS

UV Comp.

=

Figure 3 Block Diagram Buck Regulator

VS

BDS

Power

D-MOS

BUO

Data Sheet

7

Rev. 1.02, 2010-02-23

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