M62419FP
Relationship between Data and Clock
CLOCK
D0
DATA
D1
D2
D3
DATA reading mode;
The rising edge of the CLOCK signal
D11
D12
D13
LATCH SIGNAL "H"
LATCH reading mode;
The falling edge of the CLOCK signal
Digital Circuit DC Characteristics
Item
"L" level input voltage
"H" level input voltage
"L" level input current
"H" level input current
Symbol
VIL
VIH
IIL
IIH
Min
0
0.8 VDD
–10
—
Limits
Typ
~
~
—
—
Max
0.2 VDD
VDD
10
10
Unit
Test Conditions
V DATA, CLOCK pins
µA Vi = 0 DATA, CLOCK pins
Vi = VDD
Digital Circuit AC Characteristics
Item
Symbol
Min
CLOCK cycle time
tcr
4
CLOCK pulse width ("H" level)
tWHC
1.6
CLOCK pulse width ("L" level)
tWLC
1.6
CLOCK rise time
tr
—
CLOCK fall time
tf
—
DATA setup time
tSD
0.8
DATA hold time
tHD
0.8
Limits
Typ
Max
Unit
—
—
µs
—
—
—
—
—
0.4
—
0.4
—
—
—
—
Rev.2.00 Sep 14, 2006 page 4 of 8