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MAX1617(2000) 查看數據表(PDF) - ON Semiconductor

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MAX1617 Datasheet PDF : 12 Pages
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MAX1617
SMBus PORT AC TIMING (VDD = 3.3 V, –55°C (TA = TJ) 125°C; CL = 80 pF, unless otherwise noted.)
Symbol
Characteristic
Min
Typ
fSMB
tLOW
tHIGH
tR
tF
tSU(START)
SMBus Clock Frequency
Low Clock Period (10% to 10%)
High Clock Period (90% to 90%)
SMBus Rise Time (10% to 90%)
SMBus Fall Time (90% to 10%)
Start Condition Setup Time (90% SCL to 10% SDA)
(for Repeated Start Condition)
10
4.7
4
4
tH(START)
tSU–DATA
tH–DATA
tSU(STOP)
tIDLE
Start Condition Hold Time
Data in Setup Time
Data in Hold Time
Stop Condition Setup Time
Bus Free Time Prior to New Transition
4
1,000
1,250
4
4.7
SMBUS Write Timing Diagram
A
B
C
D
EF
G
ILOW IHIGH
SCL
H
IJ
Max
100
1,000
300
Unit
kHz
msec
msec
nsec
nsec
msec
msec
nsec
nsec
msec
msec
K
LM
SDA
t SU(START) t H(START)
t SU–DATA
t H–DATA
t SU(STOP) t IDLE
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master J = Acknowledge Clocked into Master
G = MSB of Data Clocked into Slave
K = Acknowledge Clock Pulse
H = LSB of Data Clocked into Slave
L = Stop Condition, Data Executed by Slave
I = Slave Pulls SDA Line Low
M= New Start Condition
SMBUS Read Timing Diagram
A
B
C
D
EF
G
ILOW IHIGH
SCL
H
I
JK
SDA
t SU(START) t H(START)
t SU–DATA
A = Start Condition
B = MSB of Address Clocked into Slave
C = LSB of Address Clocked into Slave
D = R/W Bit Clocked into Slave
E = Slave Pulls SDA Line Low
F = Acknowledge Bit Clocked into Master
G = MSB of Data Clocked into Master
H = LSB of Data Clocked into Master
t SU(STOP) t IDLE
I = Acknowledge Clock Pulse
J = Stop Condition
K = New Start Condition
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