SDA9401 查看數據表（PDF） - Unspecified

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SDA9401

Scan Rate Converter using Embedded DRAM Technology Units

Unspecified 

SDA 9401

• Flexible clock and synchronization concept

- Decoupling of the input and output clock system possible

• Scan rate conversion

- Simple 100/120 Hz interlaced scan conversion (e.g. AABB, AA*B*B)

- Simple progressive scan conversion (e.g. AA*)

• Flexible digital vertical expansion of the output signal (1.0, ... [1/32] ... , 2.0)

• Flexible output sync controller

- Flexible positioning of the output signal

- Flexible programming of the output sync raster

• Signal manipulations

- Insertion of coloured background

- Vertical and/or horizontal windowing with four different speed factors

- Flash generation

- Still field

- Support of split screen applications

- Multiple picture display - Tuner scan (4 and 16 times for 4:3, 12 times for 16:9 tubes)

- Support of multi picture display with PIP or front-end processor with integrated scaler

(e.g. 9 times display of PIP pictures, picture tracking, random pictures,

still-in-moving picture, moving-in-still picture)

• I²C-bus control (400 kHz)

• P-MQFP-64 package

• 3.3 V ± 5% supply voltage

Micronas

5

Preliminary Data Sheet

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