HIP4020(1997) 查看數據表（PDF） - Intersil
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HIP4020 Datasheet PDF : 8 Pages
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HIP4020
V+
VDD
BRAKE
ON
OFF
DIRECTION
ENABLE
B1
B2
ENB
A1
A2
ENA
CONTROL
LOGIC B
CONTROL
LOGIC A
Q1
D1
D2
Q2
Q3
D3
D4
Q4
VSS
VSSA
OUTA
OUTB
VSSB
ILF
(LOGIC
LOAD
GROUND)
V-
FIGURE 1. TYPICAL MOTOR CONTROL APPLICATION CIRCUIT SHOWING DIRECTIONAL AND BRAKING CONTROL
TRUTH TABLE
SWITCH DRIVER A
SWITCH DRIVER B
INPUTS
OUTPUT
INPUTS
OUTPUT
A1 A2 ENA
OUTA
B1 B2 ENB
OUTB
HL H
OH
LL H
OH
LL H
OL
HL H
OL
HH H
OL
LH H
OL
LH H
OL
HH H
OL
XX L
Z
XX L
Z
L = Low logic level; H = High logic level
Z = High Impedance (off state)
OH = Output High (sourcing current to the output terminal)
OL = Output Low (sinking current from the output terminal)
X = Don’t Care
FIGURE 2.
VEN
VOUT
50%
tPLH
10%
tr
90%
50%
VEN
VOUT
50%
tPHL
10%
tf
50%
90%
SWITCHING WAVEFORMS
4
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