LTC1149-5 查看數據表（PDF） - Linear Technology

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LTC1149-5

High Efficiency Synchronous Step-Down Switching Regulators

Linear Technology 

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APPLICATIO S I FOR ATIO

LTC1149 Package Dissipation

High input voltage applications in which large MOSFETs

are being driven at high frequencies may cause the maxi-

mum junction temperature rating for the LTC1149 series

to be exceeded. The LTC1149 supply current is dominated

by the gate charge supply current, which is given as a

function of operating frequency in the Typical Perfor-

mance Characteristics. The LTC1149 series junction tem-

perature can be estimated by using the equations given in

Note 1 of the Electrical Characteristics. For example, the

LT1149CS is limited to less than 11mA from a 48V supply:

TJ = 70°C + (11mA)(48V)(110°C/W)

= 128°C exceeds absolute maximum

To prevent the maximum junction temperature from being

exceeded, the Pin 2 supply current must be checked in

continuous mode when operating at the maximum VIN.

Design Example

As a design example, assume VIN = 24V, VOUT = 5V,

IMAX = 2.5A and f = 100kHz. RSENSE, CT and L can

immediately be calculated:

RSENSE

=

100mV

2.5

=

0.039Ω

) CT

= (7.8)(10–5)

100kHz

1

–

5V

24V

= 620pF

LMIN = (5.1)(105)(0.039Ω)(620pF)(5V) = 62µH

Selection of the P-channel MOSFET involves doing calcu-

lations for different sized MOSFETs to determine the

relative loss contributions. Taking an International Recti-

fier IRF9Z34 for example, RDS(ON) = 0.14Ω Max,

QP = 35nC and CRSS = 200pF (VDS = VIN/2). These values

can be used to estimate the I2R losses, transition losses

and gate charge supply current losses:

Est. I2R Loss (TJ = 100°C) =

(5V/24V)(2.5)2(1 + 0.5)0.14Ω = 270mW

Est. Transition Loss =

5(24V)2 (2.5A)(200pF)(100kHz) = 145mW

Est. Gate Charge Loss =

(100kHz)(35nC)(24V) = 85mW

LTC1149

LTC1149-3.3/LTC1149-5

The same calculations were repeated for a smaller device,

the Motorola MTD2955 (RDS(ON) = 0.3Ω) and a larger one,

the Harris RFP30P05 (RDS(ON) = 0.065Ω). The results are

summarized in the table.

CONDITIONS

VIN = 24V, VOUT = 5V

F = 100kHz, IOUT = 2.5A

Est. I2R Loss (100°C)

Est. Transition Loss

Est. Gate Charge Loss

Est. Total Loss

P-CHANNEL MOSFET

MTD2955

550mW

110mW

60mW

720mW

IRF9Z34

270mW

145mW

85mW

500mW

RFP30P05

120mW

290mW

240mW

650mW

For this set of conditions, the midsized P-channel MOSFET

actually produces the lowest total losses at IMAX. The

resulting efficiency differences will be even more pro-

nounced at lower output currents. Note that only the I2R

and transition losses are dissipated in the MOSFET; the

gate charge supply current loss is dissipated by the

LTC1149 series.

Selection of the N-channel MOSFET is somewhat easier; it

need only be sized for the anticipated I2R losses at 100%

duty cycle (worst-case assumption for short circuit.) The

Siliconix Si9410, for example, has RDS(ON) = 0.03Ω Max

and QN = 30nC. This will produce an I2R loss of 250mW at

100°C and a gate charge supply current loss of 75mW. As

with the P-channel device, the use of a larger MOSFET may

actually result in lower midcurrent efficiency.

CIN will require an RMS current rating of at least 1.25A at

temperature, and COUT will require an ESR of 0.04Ω for

optimum efficiency. The output capacitor ESR require-

ment can be fulfilled by a single OS-CON or by two or more

surface mount tantalums in parallel.

Auxiliary Windings – Suppressing Burst Mode

Operation

The LTC1149 synchronous switch removes the normal

limitation that power must be drawn from the inductor

primary winding in order to extract power from auxiliary

windings. With synchronous switching, auxiliary outputs

may be loaded without regard to the primary output load,

providing that the loop remains in continuous mode

operation.

Burst Mode operation can be suppressed at low output

currents with a simple external network which cancels the

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