KB3910 查看數據表（PDF） - Unspecified

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KB3910

Keyboard Controller

Unspecified 

KB3920 Keyboard Controller Datasheet

3.2.13 Power Pin Descriptions

Pin name Pin No Direction Description

VCC 11,26,37

-

GND 13,28,39

-

AVCC

75

-

AGND

77

-

Power Supply to all internal modules except Analog portions of ADC and

DDAigCital Ground

Analog power to analog portions of ADC and DAC

Analog Ground (paired with VCCA)

4. Module Descriptions

4.1 Chip Architecture

4.1.1 Power Planes

There are 2 power planes in KB3920. One is to be used for all logic; the other is to be used

for Analog parts (ADC/DAC).

4.1.2 Clock Domains

There are 3 clock domains in KB3920.

1. 8051 / XBI use high clock (setting in CLKCFG, FF0Dh), ranges from 4~16Mhz.

2. WDT uses 32.768Khz clock. WDT default is driven by internal 32Khz clock. The

WDTCFG bit 7 is used to switch WDT clock to external 32Khz clock oscillator.

3. Other peripherals use low clock (setting in CLKCFG, FF0Dh), ranges from 2~8Mhz.

4.1.3 Reset Domains

KB3920 builds in power-on reset. There is also an input reset signal (ECRST#) for global

resetting. The ECRST# may be tied to VCC directly.

WDT Reset will reset almost all logic, except WDT and GPIO modules. The WDT reset can

be configured to only reset 8051 by EC register (PXCFG, FF14h).

There is an additional 8051-reset source from EC register (PXCFG, FF14h).

4.1.4 Internal Memory Map

No. Abbreviation

Device Full Name

1

Flash

Program space mapped to system BIOS

2

XRAM

Embedded SRAM

3

GPIO

General Purpose IO (include ADC, DAC)

4

KBC

Keyboard Controller

5

IKB

Internal KB

6

PWM

Pulse Width Modulation

7

FAN

FAN Controller

8

GPT

General Purpose 16-bit timer

9

SDI

SPI Device Interface

Copyright©2006, ENE Technology Inc.

19

Address Range

0000h~F3FFh

F400h~FBFFh

FC00h~FC7Fh

FC80h~FC9Fh

FCA0h~FDFFh

FE00h~FE1Fh

FE20h~FE4Fh

FE50h~FE6Fh

FE70h~FE7Fh

Size (Byte)

61K

2K

128 1K

32

352

32

48

32

16

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