ETL9345 查看數據表（PDF） - STMicroelectronics
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ETL9345 Datasheet PDF : 27 Pages
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ETL9444/9445–ETL9344/9345
MEMORY REFERENCE INSTRUCTIONS
Mnem
Operand
Hex
Code
Machine
Language
Code
(binary)
Data Flow
Skip
Conditions
Description
CAMQ
33 |_0__0__1_1__|_0__0_1__1_ | A → Q7 :4
3C |_0__0__1_1__|_1__1_0__0_ | RAM (B) → Q 3 :0
None
Copy A, RAM to Q
CQMA
33 |_0__0__1_1__|_0__0_1__1_ | Q7 :4 → RAM(B)
2C |_0__0__1_0__|_1__1_0__0_ | Q3 :0 → A
None
Copy Q to RAM A
LD
r
–5 |__0__0__| _r _| _0__1_0__1_| RAM(B) → A
(r = 0:3)
Br ⊕ r → Br
None
Load RAM into A,
Exclusive-OR Br with r
LDD
r.d
23 |_0__0__1_0__|_0__0_1__1_ | RAM(r.d) → A
_| _0__|__r___|___d___ |
None
Load A with RAM pointed
to directly by r.d.
LQID
BF |_1__0__1_1__|_1__1_1__1_| ROM (PC1 0 :8A.M) → Q None
SB → SC
Load Q Indirect (note 3)
RMB
0
1
2
3
4C |_0__1__0_0__|_1__1_0__0_ | 0 → RAM (B) 0
45 |_0__1__0_0__|_0__1_0__1_ | 0 → RAM (B) 1
42 |_0__1__0_0__|_0__0_1__0_ | 0 → RAM (B) 2
43 |_0__1__0_0__|_0__0_1__1_ | 0 → RAM (B) 3
None
Reset RAM Bit
SMB
0
1
2
3
4D |_0__1__0_0__|_1__1_0__1_ | 1 → RAM (B) 0
47 |_0__1__0_0__|_1__1_0__1_ | 1 → RAM (B) 1
46 |_0__1__0_0__|_0__1_1__0_ | 1 → RAM (B) 2
4B |_0__1__0_0__|_1__0_1__1_ | 1 → RAM (B) 3
None
Set RAM Bit
STII
y
7– |_0__1__1_1__|___y____ | y → RAM (B)
Bd + 1 → Bd
None
Store Memory Immediate
and Increment Bd
X
r
–6 |_0__0__| _r __| _0_1__1__0_| RAM (B) £ A
(r = 0:3)
Br ⊕ r → Br
None
Exchange RAM with A,
Exclusive-OR Br with r
XAD
r.d
23 |_0__0__1_0__|_0__0_1__1_ | RAM (r.d) £ A
|_1__| ___r___|___d___ |
None
Exchange A with RAM
pointed to directly by r.d.
XDS
r
–7 |_0__0__| _r __| _0_1__1__1_| RAM (B) £ A
(r = 0:3)
Bd – 1 → Bd
Br ⊕ r → Br
Bd
Exchange RAM with A and
Decrements Decrement Bd,
Past 0
Exclusive-OR Br with r
XIS
r
–4 |_0__0__| _r __| _0_1__0__0_| RAM (B) £ A
(r = 0:3)
Bd + 1 → Bd
Br ⊕ r → Br
Bd
Exchange RAM with A and
Increments Increment Bd,
Past 15
Exclusive-OR Br with r
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