MACH111SP5JC 查看數據表（PDF） - Lattice Semiconductor

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MACH111SP5JC

High-Performance EE CMOS Programmable Logic

Lattice Semiconductor 

initialization values, the VCC rise must be monotonic and the clock must be inactive until the reset

delay time has elapsed.

SECURITY BIT

A security bit is provided on the MACH devices as a deterrent to unauthorized copying of the array

configuration patterns. Once programmed, this bit defeats readback of the programmed pattern by

a device programmer, securing proprietary designs from competitors. Programming and

verification are also defeated by the security bit. The bit can only be reset by erasing the entire

device.

14

MACH 1 & 2 Families

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