IDT7015S17G(1996) 查看數據表（PDF） - Integrated Device Technology
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IDT7015S17G Datasheet PDF : 20 Pages
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IDT7015S/L
HIGH-SPEED 8K x 9 DUAL-PORT STATIC RAM
MILITARY AND COMMERCIAL TEMPERATURE RANGES
WAVEFORM OF BUSY ARBITRATION CONTROLLED BY CE TIMING (M/S = VIH)(1)
ADDR"A"
and "B"
ADDRESSES MATCH
CE"A"
tAPS (2)
CE"B"
tBAC
BUSY"B"
tBDC
2954 drw 15
WAVEFORM OF BUSY ARBITRATION CYCLE CONTROLLED BY ADDRESS MATCH TIMING
(M/S = VIH)(1)
ADDR"A"
tAPS (2)
ADDRESS "N"
ADDR"B"
MATCHING ADDRESS "N"
tBAA
BUSY"B"
tBDA
2954 drw 16
NOTES:
1. All timing is the same for left and right ports. Port “A” may be either the left or right port. Port “B” is the port opposite from “A”.
2. If tAPS is not satisfied, the busy signal will be asserted on one side or another but there is no guarantee on which side busy will be asserted.
AC ELECTRICAL CHARACTERISTICS OVER THE
OPERATING TEMPERATURE AND SUPPLY VOLTAGE RANGE(1)
Symbol
Parameter
IDT7015X12
Com'l. Only
Min. Max.
IDT7015X15
Com'l. Only
Min.
Max.
INTERRUPT TIMING
tAS
Address Set-up Time
0
—
0
—
tWR
Write Recovery Time
0
—
0
—
tINS
Interrupt Set Time
—
12
—
15
tINR
Interrupt Reset Time
—
12
—
15
IDT7015X17
Com'l. Only
Min
Max.
Unit
0
—
ns
0
—
ns
—
17
ns
—
17
ns
Symbol
Parameter
INTERRUPT TIMING
tAS
Address Set-up Time
tWR
Write Recovery Time
tINS
Interrupt Set Time
tINR
Interrupt Reset Time
NOTE:
1. "X" in part numbers indicates power rating (S or L).
IDT7015X20
Min. Max.
IDT7015X25
Min. Max.
IDT7015X35
Min. Max. Unit
0
—
0
—
0
— ns
0
—
0
—
0
— ns
—
20
—
20
—
25 ns
—
20
—
20
—
25 ns
2739 tbl 14
6.12
14
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