M4A5-32/32-7VI 查看數據表（PDF） - Lattice Semiconductor

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M4A5-32/32-7VI

High Performance E2CMOS® In-System Programmable Logic

Lattice Semiconductor 

Revision History

Date

-

August 2006

September 2006

Version

K

L

M

Change Summary

Previous Lattice release.

Updated for lead-free package options.

Revised M4A3-256/160 208-pin PQFP connection diagram.

© 2006 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand

or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.

62

ispMACH 4A Family

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