LTC1164-8(RevA) 查看數據表（PDF） - Linear Technology
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LTC1164-8
(Rev.:RevA)
(Rev.:RevA)
Linear Technology
LTC1164-8 Datasheet PDF : 12 Pages
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LTC1164-8
PIN FUNCTIONS (14-Lead PDIP)
V +, V – (Pins 4, 12): Power Supply Pins. The V + (Pin 4)
and the V – (Pin 12) should be bypassed with a 0.1µF
capacitor to a reliable ground plane. The filter’s power
supplies should be isolated from other digital or high
voltage analog supplies. A low noise linear supply is
recommended. Using a switching power supply will
lower the signal-to-noise ratio of the filter. The power
supply during power-up should have a slew rate of less
than 1V/µs.
For dual supply operation if the V + supply is applied before
the V – supply or the V – supply is applied before the V +
supply, a signal diode on each supply pin to ground will
prevent latchup. Figures 1 and 2 show typical connections
for dual and single supply operation.
fCLK (Pin 11): Clock Input Pin. Any TTL or CMOS clock
source with a square wave output and 50% duty cycle
(±10%) is an adequate clock source for the device. The
power supply for the clock source should not be the filter’s
power supply. The analog ground for the filter should be
connected to the clock’s ground at a single point only.
Table 1 shows the clock’s low and high level threshold
values for dual or single supply operation. A pulse genera-
tor can be used as a clock source provided the high level
on-time is at least 1µs. Sine waves are not recommended
for clock input frequencies less than 100kHz. The clock’s
rise or fall time should be equal to or less than 1µs.
Table 1. Clock Source High and Low Threshold Levels
POWER SUPPLY
HIGH LEVEL
LOW LEVEL
Single Supply = 5V
> 1.45V
< 0.5V
Single Supply = 12V
> 7.80V
< 6.5V
Dual Supply = ±2.5V
> 0.73V
<– 2.0V
Dual Supply = ±5V
> 1.45V
< 0.5V
Dual Supply = ±7.5V
> 2.18V
< 0.5V
5V
*1N4148
OR EQUIVALENT
RIN
340k
VIN
0.1µF
1
14
2
13
3
12
4 LTC1164-8 11
5
10
6
9
7
8
RF
61.9k
5V
– 5V
fCLK
0.1µF
1N4148*
OR EQUIVALENT
2–
7
*FOR SURFACE MOUNT CIRCUITS
USE MOTOROLA DIODE MBR0530
3+
OR EQUIVALENT
4
0.1µF
6
VOUT
LTC1164-8 • F01
0.1µF
Figure 1. Dual Power Supply Operation (Gain = 1) –5V
RIN
340k
VIN
5V
15k
+
1µF 10k
0.1µF
1
14
2
13
3
12
4 LTC1164-8 11
5
10
6
9
7
8
RF
61.9k
5V
fCLK
2–
7
3+
4
0.1µF
6
VOUT
LTC1164-8 • F02
Figure 2. Single Power Supply Operation (Gain = 1)
5
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