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MAX8655 查看數據表(PDF) - Maxim Integrated

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MAX8655 Datasheet PDF : 23 Pages
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Highly Integrated, 25A, Wide-Input,
Internal MOSFET, Step-Down Regulator
Detailed Description
DC-DC Converter Control Architecture
The MAX8655 step-down regulator uses a PWM, peak
current-mode control scheme. An internal transconduc-
tance amplifier establishes an integrated error voltage.
The heart of the PWM controller is a PWM comparator
that compares the integrated voltage-feedback signal
against the amplified current-sense signal plus an
adjustable slope-compensation ramp, which is
summed with the current signal to ensure stability. At
each rising edge of the internal clock, the internal high-
side MOSFET turns on until the PWM comparator trips
or the maximum duty cycle is reached. During this on-
time, current ramps up through the inductor, storing
energy in the output inductor while sourcing current to
the output. The current-mode feedback system regu-
lates the peak inductor current as a function of the out-
put-voltage error signal. The circuit acts as a
switch-mode transconductance amplifier and pushes
the output LC filter pole normally found in a voltage-
mode PWM to a higher frequency. Figure 1 is the func-
tional diagram.
During the second half of the cycle, the internal high-
side MOSFET turns off and the internal low-side MOS-
FET turns on. The output inductor releases the stored
energy as the current ramps down, providing current to
the load. The output capacitor stores charge when the
inductor current exceeds the required load current and
discharges when the inductor current is lower, smooth-
ing the voltage across the load. Under soft-overload
conditions, when the peak inductor current exceeds the
selected current limit (see the Current-Limit Circuit sec-
tion), the high-side MOSFET is turned off immediately
and the low-side MOSFET is turned on and remains on
to let the inductor current ramp down until the next
clock cycle. Under severe-overload or short-circuit con-
ditions, the valley foldback current limit is enabled to
reduce power dissipation of external components.
The MAX8655 operates in a forced-PWM mode. As a
result, the regulator maintains a constant switching fre-
quency, regardless of load, to allow for easier filtering
of the switching noise.
Internal Linear Regulators
The MAX8655 contains two internal LDO regulators.
The AVL regulator provides 5V for the IC’s internal cir-
cuitry, and the VL regulator provides 6.5V for the MOS-
FET gate drivers. Connect a 2.2µF ceramic capacitor
from VL to VLGND, and connect a 1µF ceramic capaci-
tor from AVL to GND. The AVL regulator input is inter-
nally connected to the VL regulator output. For 5V input
applications, connect VL directly to IN and connect a
10resistor from VL to AVL.
Undervoltage Lockout
When VAVL drops below 4.03V, the MAX8655 assumes
that the supply voltage is too low to make valid deci-
sions, so the undervoltage-lockout (UVLO) circuitry
inhibits switching and turns off both internal power
MOSFETs. When VAVL rises above 4.15V, the regulator
enters the startup sequence and then resumes normal
operation.
Startup and Soft-Start
The internal soft-start circuitry gradually ramps up the
reference voltage to control the rate of rise of the output
voltage and reduce input surge currents during startup.
The soft-start period is determined by the value of the
capacitor from SS to GND. The soft-start time is
approximately (30.4ms/µF) x CSS. The MAX8655 also
features monotonic output-voltage rise; therefore, both
power MOSFETs are kept off if the voltage at FB is
higher than the voltage at SS. This allows the MAX8655
to start up into a prebiased output without pulling the
output voltage down.
Before the MAX8655 begins the soft-start and power-
up sequence, the following conditions must be met:
• VAVL exceeds the 4.15V UVLO threshold.
• EN is at logic-high.
• The thermal limit is not exceeded.
Enable
The MAX8655 features a low-power shutdown mode. A
logic-low at EN shuts down the regulator. During shut-
down, the output is high impedance. Shutdown
reduces the IN current to less than 10µA. A logic-high
at EN enables the regulator.
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