LC5824 查看數據表（PDF） - SANYO -> Panasonic

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LC5824

4-Bit Single-Chip Microcontrollers Featuring 4 KB to 8 KB of ROM, 1 Kbit of RAM, and an LCD Driver for Medium Speed Small-Scale Control Applications

SANYO -> Panasonic 

LC5824, LC5823, LC5822

Continued from preceding page.

Parameter

Symbol

Conditions and applicable pins

Ratings

Unit

min

typ

max

[1/3 Bias - 1/3 Duty and 1/3 Bias - 1/4 Duty Drive]

High-level output voltage

Middle-level output voltage

Low-level output voltage

High-level output voltage

VOH5

VOM1–5

VOM2–5

VOL5

VOH6

VDD = 3.0 V, IOH = –0.4 µA, SEGOUT

VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA, SEGOUT

VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA, SEGOUT

VDD = 3.0 V, IOL = 0.4 µA, SEGOUT

VDD = 3.0 V, IOH = –0.4 µA,

COM1 to COM3 (in 1/3 duty mode)

COM1 to COM4 (in 1/4 duty mode)

VDD3 + 0.2

VDD2 – 0.2

VDD1 – 0.2

VDD3 + 0.2

V

VDD2 + 0.2 V

VDD1 + 0.2 V

0.2 V

V

Middle-level output voltage

VOM1–6

VOM2–6

VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA,

COM1 to COM3 (in 1/3 duty mode)

COM1 to COM4 (in 1/4 duty mode)

VDD = 3.0 V, IOH = –0.4 µA, IOL = 0.4 µA,

COM1 to COM3 (in 1/3 duty mode)

COM1 to COM4 (in 1/4 duty mode)

VDD2 – 0.2

VDD1 – 0.2

VDD2 + 0.2 V

VDD1 + 0.2 V

Low-level output voltage

[Output Voltage]

VOL6 VDD = 3.0 V, IOL = 0.4 µA

0.2 V

LCD drive method: 1/3 bias

(halver)

VDD1

VDD = 3.0 V, fopg = 32.768 kHz,

C1 to C4 = 0.1 µF, Figure 6

1.35

V

(tripler)

VDD3

VDD = 3.0 V, fopg = 32.768 kHz,

C1 to C4 = 0.1 µF, Figure 6

4.1

V

LCD drive method: 1/2 bias

(halver)

VDD1 VDD = 3.0 V, fopg 32.768 kHz, C1 = C2 = 0.1 µF, Figure 7

1.35

V

[Current Drain (With the backup flag cleared)]

LCD drive method: 1/3 bias

| IDD |

VDD = 3.0 V, Halt mode, C1 to C4 = 0.1 µF, CI = 25 kΩ

Co = Cg = 20 pF, 32.768 kHz Xtal, Figure 6

5.0

µA

LCD drive methods other than

1/3 bias

| IDD |

VDD = 3.0 V, Halt mode, C1 to C2 = 0.1 µF, CI = 25 kΩ,

Figure 7, Co = Cg = 20 pF, 32.768 kHz, Xtal

5.0

µA

Oscillator start voltage

Vstt

VDD = VDD2, CI = 25 kΩ, Figure 4,

Co = Cg = 20 pF, 32.768 kHz Xtal

2.2 V

Oscillator hold voltage

(with the backup flag cleared)

VHOLD

VDD = VDD2, CI = 25 kΩ, , Figures 5, 6, 7, and 8,

Co = Cg = 20 pF, 32.768 kHz Xtal

2.0

V

Oscillator start time

Tstt

VDD = VDD2 = 2.2 V, CI = 25 kΩ, Figure 4

Co = Cg = 20 pF, 32.768 kHz Xtal

10 sec

Oscillator correction capacitance

10P XC

20P XTOUT

8

10

16

20

12 pF

24 pF

Note : 1. S1 to 4, K1 to 4

2. M1 to 4, A1 to 4, SO1 to 4

No. 5944-21/24

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