WM8778SEDS/RV 查看數據表（PDF） - Wolfson Microelectronics plc

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WM8778SEDS/RV

24-bit, 192kHz Stereo CODEC

Wolfson Microelectronics plc 

WM8778

Production Data

The signal processing for the WM8778 typically operates at an oversampling rate of 128fs for both

ADC and DAC. The exception to this for the DAC is for operation with a 128/192fs system clock, e.g.

for 192kHz operation where the oversampling rate is 64fs. For ADC operation at 96kHz it is

recommended that the user set the ADCOSR bit. This changes the ADC signal processing

oversample rate to 64fs.

SAMPLING

RATE

(DACLRC/

ADCLRC)

System Clock Frequency (MHz)

128fs

192fs

256fs

384fs

512fs

DAC ONLY

768fs

32kHz

4.096

6.144

8.192

12.288

16.384

24.576

44.1kHz

5.6448

8.467

11.2896 16.9340 22.5792 33.8688

48kHz

6.144

9.216

12.288

18.432

24.576

36.864

96kHz

12.288 18.432

24.576

36.864 Unavailable Unavailable

192kHz

24.576 36.864 Unavailable Unavailable Unavailable Unavailable

Table 6 System Clock Frequencies Versus Sampling Rate

In Master mode DACBCLK, ADCBCLK, DACLRC and ADCLRC are generated by the WM8778. The

frequencies of ADCLRC and DACLRC are set by setting the required ratio of DACMCLK to DACLRC

and ADCMCLK to ADCLRC using the DACRATE and ADCRATE control bits (Table 7).

ADCRATE[2:0]/

DACRATE[2:0]

000

001

010

011

100

101

ADCMCLK/DACMCLK:

ADCLRC/DACLRC

RATIO

128fs (DAC Only)

192fs (DAC Only)

256fs

384fs

512fs

768fs

Table 7 Master Mode MCLK:ADCLRC/DACLRC Ratio Select

Table 8 shows the settings for ADCRATE and DACRATE for common sample rates and

ADCMCLK/DACMCLK frequencies.

SAMPLING

RATE

(DACLRC/

ADCLRC)

32kHz

44.1kHz

48kHz

96kHz

192kHz

128fs

DACRATE

=000

4.096

5.6448

6.144

12.288

24.576

System Clock Frequency (MHz)

192fs

256fs

384fs

512fs

768fs

DACRATE

=001

6.144

8.467

9.216

18.432

36.864

ADCRATE/

DACRATE

=010

ADCRATE/

DACRATE

=011

ADCRATE/

DACRATE

=100

ADCRATE/

DACRATE

=101

8.192

12.288

16.384

24.576

11.2896 16.9340 22.5792 33.8688

12.288

18.432

24.576

36.864

24.576

36.864 Unavailable Unavailable

Unavailable Unavailable Unavailable Unavailable

Table 8 Master Mode ADC/DACLRC Frequency Selection

w

PD, Rev 4.2, July 2008

16

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