WM8778SEDS/RV 查看數據表（PDF） - Wolfson Microelectronics plc
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WM8778SEDS/RV Datasheet PDF : 52 Pages
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WM8778
DACBCLK
ADCBCLK
WM8778 ADCLRC
CODEC DACLRC
DOUT
DIN
DVD
Controller
Production Data
Figure 11 Slave Mode
In Master mode (MS=1) ADCLRC, DACLRC, ADCBCLK and DACBCLK are outputs from the
WM8778 (Figure 12). ADCLRC, DACLRC, ADCBCLK and DACBCLK are generated by the WM8778.
DIN is sampled by the WM8778 on the rising edge of DACBCLK so the controller must output DAC
data that changes on the falling edge of DACBCLK. ADC data is output on DOUT and changes on
the falling edge of ADCBCLK. By setting control bit BCLKINV, the polarity of ADCBCLK and
DACBCLK may be reversed so that DIN is sampled on the falling edge of DACBCLK and DOUT
changes on the rising edge of ADCBCLK.
DACBCLK
ADCBCLK
ADCLRC
WM8778
CODEC DACLRC
DOUT
DIN
DVD
Controller
Figure 12 Master Mode
AUDIO INTERFACE FORMATS
Audio data is applied to the internal DAC filters or output from the ADC filters, via the Digital Audio
Interface. 5 popular interface formats are supported:
• Left Justified mode
• Right Justified mode
• I2S mode
• DSP mode A
• DSP mode B
All 5 formats send the MSB first and support word lengths of 16, 20, 24 and 32 bits, with the
exception of 32 bit right justified mode, which is not supported.
In left justified, right justified and I2S modes, the digital audio interface receives DAC data on the DIN
input and outputs ADC data on DOUT. Audio Data for each stereo channel is time multiplexed with
ADCLRC/DACLRC indicating whether the left or right channel is present. ADCLRC/DACLRC is also
used as a timing reference to indicate the beginning or end of the data words.
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PD, Rev 4.2, July 2008
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