CXD3521GG 查看數據表（PDF） - Sony Semiconductor
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CXD3521GG Datasheet PDF : 22 Pages
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Vertical Direction Input Signal Timing Chart
230
235
240
245
250
255
260
0
Hsync∗1
Vsync∗1
DENB∗1
10 lines
14 lines
264 lines
5
10
15
Hsync∗1
Vsync∗1
DENB∗1
(1)
tvhde
(2)
tvsw
DATA
∗1 Input either Hsync + Vsync or DENB as sync input signal.
(14)
(15)
1st Line
Input Signal AC Characteristics (VDD1 = 3.0 to 3.6V, Ta = –25 to +75°C)
Item
Hsync falling edge
→ Vsync falling edge
Vsync low pulse width
Symbol Min.
Typ.
Max.
tvhde
3tclk
— 352tclk
tvsw
2 lines — 14 lines
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