CY2DP1510AXC 查看數據表（PDF） - Cypress Semiconductor
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CY2DP1510AXC Datasheet PDF : 13 Pages
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CY2DP1510
DC Electrical Specifications
(VDD = 3.3 V ± 5% or 2.5 V ± 5%; TA = 0 °C to 70 °C (Commercial) or –40 °C to 85 °C (Industrial))
Parameter
Description
Condition
Min
Max Unit
IDD
Operating supply current
All LVPECL outputs floating (internal IDD)
–
120
mA
VIH1
Input high voltage, LVPECL input clocks
IN0 and IN0#, IN1 and IN1#
–
VDD + 0.3 V
VIL1
Input low voltage, LVPECL input clocks
IN0 and IN0#, IN1 and IN1#
–0.3
–
V
VIH2
VIL2
VIH3
VIL3
VID[3]
VICM
IIH
IIL
VOH
VOL
VBB
RP
CIN
Input high voltage, IN_SEL
Input low voltage, IN_SEL
Input high voltage, IN_SEL
Input low voltage, IN_SEL
Input differential amplitude
Input common mode voltage
Input high current, All inputs
Input low current, All inputs
LVPECL output high voltage
LVPECL output low voltage
Output reference voltage
Internal pull-down resistance
Input capacitance
VDD = 3.3 V
VDD = 3.3 V
VDD = 2.5 V
VDD = 2.5 V
See Figure 2 on page 7
See Figure 2 on page 7
Input = VDD[4]
Input = VSS[4]
Terminated with 50 Ω to VDD – 2.0[5]
Terminated with 50 Ω to VDD – 2.0[5]
0 to 150 μA output current
IN_SEL pin
Measured at 10 MHz; per pin
2.0
–0.3
VDD + 0.3 V
0.8
V
1.7
–0.3
VDD + 0.3 V
0.7
V
0.4
1.0
V
0.5 VDD – 0.2 V
–
150
μA
–150
–
μA
VDD – 1.20 VDD – 0.70 V
VDD – 2.0 VDD – 1.63 V
VDD – 1.40 VDD – 1.16 V
60
140
kΩ
–
3
pF
Notes
3. VID minimum of 400 mV is required to meet all output AC electrical specifications. The device is functional with VID minimum of greater than 200 mV.
4. Positive current flows into the input pin, negative current flows out of the input pin.
5. Refer to Figure 3 on page 7.
Document Number: 001-55566 Rev. *G
Page 5 of 13
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