M1A3P250-FTQG144I 查看數據表（PDF） - Unspecified
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M1A3P250-FTQG144I Datasheet PDF : 196 Pages
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ProASIC3 DC and Switching Characteristics
Power per I/O Pin
Table 2-8 • Summary of I/O Input Buffer Power (per pin) – Default I/O Software Settings1
Applicable to Advanced I/O Banks
Single-Ended
CLOAD (pF)
VCCI (V)
Static Power
PDC3 (mW)2
Dynamic Power
PAC10 (µW/MHz)3
3.3 V LVTTL /
35
3.3
3.3 V LVCMOS
–
468.67
2.5 V LVCMOS
35
2.5
–
267.48
1.8 V LVCMOS
35
1.8
–
149.46
1.5 V LVCMOS
35
1.5
(JESD8-11)
–
103.12
3.3 V PCI
10
3.3
–
201.02
3.3 V PCI-X
10
3.3
–
201.02
Differential
LVDS
–
2.5
7.74
88.92
LVPECL
–
3.3
19.54
166.52
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength
and output slew.
2. PDC3 is the static power (where applicable) measured on VMV.
3. PAC10 is the total dynamic power measured on VCC and VMV.
Table 2-9 • Summary of I/O Input Buffer Power (Per Pin) – Default I/O Software Settings1
Applicable to Standard Plus I/O Banks
Single-Ended
CLOAD (pF)
VCCI (V)
Static Power
PDC3 (mW)2
Dynamic Power
PAC10 (µW/MHz)3
3.3 V LVTTL /
35
3.3
3.3 V LVCMOS
–
452.67
2.5 V LVCMOS
35
2.5
–
258.32
1.8 V LVCMOS
35
1.8
–
133.59
1.5 V LVCMOS
35
1.5
(JESD8-11)
–
92.84
3.3 V PCI
10
3.3
–
184.92
3.3 V PCI-X
10
3.3
–
184.92
Notes:
1. Dynamic power consumption is given for standard load and software default drive strength
and output slew.
2. PDC3 is the static power (where applicable) measured on VMV.
3. PAC10 is the total dynamic power measured on VCC and VMV.
v1.1
2-7
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