74AHCT259-Q100 查看數據表（PDF） - NXP Semiconductors.
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74AHCT259-Q100 Datasheet PDF : 19 Pages
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NXP Semiconductors
74AHC259-Q100; 74AHCT259-Q100
8-bit addressable latch
6. Functional description
Table 3. Function table[1]
Operating mode
Input
MR LE D
Reset (clear)
L HX
Demultiplexer
LLd
(active HIGH 8-channel)
d
decoder (when D = H)
d
d
d
d
d
d
Memory (no action)
HHX
Addressable latch
HL d
d
d
d
d
d
d
H
Output
A0 A1 A2 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
XXXL
L
L
L
L
L
L
L
L L L Q=d L
L
L
L
L
L
L
HL L L
Q=d L
L
L
L
L
L
L HL L
L
Q=d L
L
L
L
L
HHL L
L
L
Q=d L
L
L
L
L L HL
L
L
L
Q=d L
L
L
HL HL
L
L
L
L
Q=d L
L
L HHL
L
L
L
L
L
Q=d L
HHHL
L
L
L
L
L
L
Q=d
X X X q0
q1
q2
q3
q4
q5
q6
q7
L
L
L Q = d q1
q2
q3
q4
q5
q6
q7
H L L q0
Q = d q2
q3
q4
q5
q6
q7
L
H L q0
q1
Q = d q3
q4
q5
q6
q7
HHL
q0
q1
q2
Q = d q4
q5
q6
q7
L
L H q0
q1
q2
q3
Q = d q5
q6
q7
H L H q0
q1
q2
q3
q4
Q = d q6
q7
L
H H q0
q1
q2
q3
q4
q5
Q = d q7
H H H q0
q1
q2
q3
q4
q5
q6
Q=d
[1] H = HIGH voltage level;
L = LOW voltage level;
X = don’t care;
d = HIGH or LOW data one set-up time prior to the LOW-to-HIGH LE transition;
q = lower case letter indicates the state of the referenced input one set-up time prior to the LOW-to-HIGH transition.
74AHC_AHCT259_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 22 July 2013
© NXP B.V. 2013. All rights reserved.
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